Veranstaltung
Low Power Design and Embedded Systems [WS202424120]
Einrichtung
- ITEC Henkel
Bestandteil von
Anmerkung
This lab is composed of two main experiments. The first part consists of an exploration and analysis of the effect of loop transformation techniques and compiler optimizations in the power consumption, execution time and cache performance. SimpleScalar and Wattch simulators are used to run the applications and to obtain metrics to analyze.
The second part of the lab consists of a Hardware / Software Co-design exploration using a High-Level Synthesis (HLS) Tool called “LegUp”. This tool is capable to take a C code implementation and to produce three types of implementations: a complete hardware (RTL) implementation, a software implementation to be executed in a MIPS soft-processor, and a hybrid implementation where one or more functions of a program are compiled to hardware accelerators with the remaining program segments running in software in a MIPS soft processor. Considering these possibilities, the participants of the lab will perform an exploration and analysis of the implementations in
terms of required execution cycles, maximum frequency, area (FPGA resources), and power consumption. Altera Quartus tools are used to synthesize the implementations and obtain metrics, while Modelsim tool is used to perform simulations.
Preliminary discussion appointment: it will be announced via email to all registrants.
Note: The lab is given as a full week block.